Principles of Verifiable RTL Design: A functional coding style supporting verification processes in Verilog - Lionel Bening - Books - Springer-Verlag New York Inc. - 9781475773132 - April 12, 2013
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Principles of Verifiable RTL Design: A functional coding style supporting verification processes in Verilog Softcover reprint of the original 1st ed. 2000 edition

Lionel Bening

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Principles of Verifiable RTL Design: A functional coding style supporting verification processes in Verilog Softcover reprint of the original 1st ed. 2000 edition

Principles of Verifiable RTL Design: A Functional Coding Style Supporting Verification Processes in Verilog explains how you can write Verilog to describe chip designs at the RT-level in a manner that cooperates with verification processes.


253 pages, 19 black & white illustrations

Media Books     Paperback Book   (Book with soft cover and glued back)
Released April 12, 2013
ISBN13 9781475773132
Publishers Springer-Verlag New York Inc.
Pages 253
Dimensions 155 × 235 × 14 mm   ·   385 g
Language English