Hierarchical Modeling for VLSI Circuit Testing - The Springer International Series in Engineering and Computer Science - Debashis Bhattacharya - Books - Springer - 9780792390589 - December 31, 1989
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Hierarchical Modeling for VLSI Circuit Testing - The Springer International Series in Engineering and Computer Science 1990 edition

Debashis Bhattacharya

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Hierarchical Modeling for VLSI Circuit Testing - The Springer International Series in Engineering and Computer Science 1990 edition

To match this high-level circuit model, we introduce a high-level bus fault that, in effect, replaces a large number of SSL faults and allows them to be tested in parallel.

160 pages, biography

Media Books     Hardcover Book   (Book with hard spine and cover)
Released December 31, 1989
ISBN13 9780792390589
Publishers Springer
Pages 160
Dimensions 155 × 235 × 11 mm   ·   426 g
Language English  
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